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@ -26,11 +26,15 @@
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#define U0THRE ((UREG(LSR) & (1<<5))) /* UART0 transmitter holding register is empty */ |
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#define U0DR ((UREG(LSR) & (1<<0))) /* UART0 data ready */ |
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#define UART_BUFSIZE 128 |
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#define UART_TXBUFSIZE 128 |
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#define UART_RXBUFSIZE 128 |
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char uart_txbuf[UART_BUFSIZE]; |
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char uart_txbuf[UART_TXBUFSIZE]; |
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char uart_rxbuf[UART_RXBUFSIZE]; |
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volatile int uart_txread; |
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volatile int uart_txwrite; |
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volatile int uart_rxread; |
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volatile int uart_rxwrite; |
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volatile bool tx_running; |
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void __attribute__((interrupt("IRQ"))) uart_interrupt_handler(void); |
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@ -47,15 +51,17 @@ void init_uart(void)
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uart_txread = 0; |
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uart_txwrite = 0; |
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uart_rxread = 0; |
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uart_rxwrite = 0; |
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tx_running = FALSE; |
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interrupt_register(UART0, uart_interrupt_handler); |
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UREG(IER) = 0x02; /* THRE interrupt enable */ |
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UREG(IER) = 0x03; /* RBR and THRE interrupt enable */ |
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} |
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void putch(char c) { |
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/* Wait for space in the buffer */ |
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while (uart_txread == ((uart_txwrite+1) % UART_BUFSIZE)); |
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while (uart_txread == ((uart_txwrite+1) % UART_TXBUFSIZE)); |
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if (uart_txread == uart_txwrite) { |
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if (U0THRE) { |
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@ -66,12 +72,12 @@ void putch(char c) {
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} |
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uart_txbuf[uart_txwrite] = c; |
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uart_txwrite = (uart_txwrite + 1) % UART_BUFSIZE; |
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uart_txwrite = (uart_txwrite + 1) % UART_TXBUFSIZE; |
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if (!tx_running) { |
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if (uart_txread != uart_txwrite) { |
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tx_running = TRUE; |
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uart_txread = (uart_txread + 1) % UART_BUFSIZE; |
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uart_txread = (uart_txread + 1) % UART_TXBUFSIZE; |
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UREG(THR) = c; |
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} |
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} |
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@ -86,29 +92,48 @@ void __attribute__((interrupt("IRQ"))) uart_interrupt_handler(void)
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* to treat them as such in this handler, so let the compiler |
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* have an easier time. |
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*/ |
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int local_txwrite = uart_txwrite; |
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int local_txread = uart_txread; |
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int local_txwrite; |
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int local_txread; |
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int local_rxwrite; |
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int local_rxread; |
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source = UREG(IIR); |
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/* For now we assume that all interrupts are actually THR empty
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* interrupts. Actually check this when we do more things with |
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* the UART |
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*/ |
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switch (source & 0x0e) { |
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case 0x4: /* Receive Data Available */ |
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case 0xc: /* Character Time-out Indicator */ |
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local_rxwrite = uart_rxwrite; |
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local_rxread = uart_rxread; |
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while (U0DR) { |
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unsigned char c = UREG(RBR); |
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if (local_rxread != |
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((local_rxwrite+1) % UART_RXBUFSIZE)) { |
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uart_rxbuf[local_rxwrite] = c; |
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local_rxwrite = (local_rxwrite + 1) % |
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UART_RXBUFSIZE; |
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} |
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} |
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uart_rxwrite = local_rxwrite; |
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break; |
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if (U0THRE) { |
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case 0x2: /* THRE interrupt */ |
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local_txwrite = uart_txwrite; |
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local_txread = uart_txread; |
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for (i = 0; (i < 16) && (local_txwrite != local_txread); i++) { |
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UREG(THR) = uart_txbuf[local_txread]; |
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local_txread = (local_txread + 1) % UART_BUFSIZE; |
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local_txread = (local_txread + 1) % UART_TXBUFSIZE; |
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active = TRUE; |
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} |
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uart_txread = local_txread; |
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if (!active) |
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tx_running = FALSE; |
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break; |
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case 0x6: /* Receive Line Status */ |
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default: /* Anything else */ |
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break; |
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} |
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uart_txread = local_txread; |
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if (!active) |
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tx_running = FALSE; |
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interrupt_clear(); |
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} |
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@ -148,8 +173,13 @@ void puthex(unsigned int n) {
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} |
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char getch(void) { |
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while (!U0DR) { |
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char c; |
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while (uart_rxread == uart_rxwrite) { |
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FP0XVAL ^= 0x04000000; |
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} |
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return UREG(RBR); |
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c = uart_rxbuf[uart_rxread]; |
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uart_rxread = (uart_rxread + 1) % UART_RXBUFSIZE; |
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return c; |
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} |
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